XC7Z020

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Zynq-7000 SoC First Generation Architecture：
Ang pamilyang Zynq®-7000 ay batay sa Xilinx SoC architecture.Isinasama ng mga produktong ito ang isang mayaman sa tampok na dual-core o single-core ARM® Cortex™-A9 based processing system (PS) at 28 nm Xilinx programmable logic (PL) sa iisang device.Ang ARM Cortex-A9 na mga CPU ay ang puso ng PS at kasama rin ang on-chip memory, mga external na interface ng memorya, at isang rich set ng peripheral connectivity interface.Processing System (PS) ARM Cortex-A9 Based Application Processor Unit (APU) • 2.5 DMIPS/MHz per CPU • CPU frequency: Hanggang 1 GHz • Coherent multiprocessor support • ARMv7-A architecture • TrustZone® security • Thumb®-2 instruction set • Jazelle® RCT execution Environment Architecture • NEON™ media-processing engine • Single at double precision Vector Floating Point Unit (VFPU) • CoreSight™ at Program Trace Macrocell (PTM) • Timer at Interrupts • Tatlong watchdog timers • Isang global timer • Dalawang triple-timer counter Mga Cache • 32 KB Level 1 4-way set-associative na pagtuturo at data cache (independyente para sa bawat CPU) • 512 KB 8-way set-associative Level 2 cache (ibinahagi sa pagitan ng mga CPU) • Byte-parity na suporta On-Chip Memory • On-chip boot ROM • 256 KB on-chip RAM (OCM) • Byte-parity support External Memory Interfaces • Multiprotocol dynamic memory controller • 16-bit o 32-bit interface sa DDR3, DDR3L, DDR2, o LPDDR2 memory • ECC support sa 16-bit mode • 1GB ng address space gamit ang single rank ng 8-, 16-, o 32-bit-wide na memorya • Mga static na memory interface • 8-bit SRAM data bus na may hanggang 64 MB support • Parallel NOR flash support • ONFI1.0 NAND flash support (1-bit ECC ) • 1-bit SPI, 2-bit SPI, 4-bit SPI (quad-SPI), o dalawang quad-SPI (8-bit) serial NOR flash 8-Channel DMA Controller • Memory-to-memory, memory-to -peripheral, peripheral-to-memory, at scatter-gather transaction support I/O Peripherals and Interfaces • Dalawang 10/100/1000 tri-speed Ethernet MAC peripheral na may IEEE Std 802.3 at IEEE Std 1588 revision 2.0 support • Scatter-gather DMA kakayahan • Pagkilala sa 1588 rev.2 PTP frames • GMII, RGMII, at SGMII interface • Dalawang USB 2.0 OTG peripheral, bawat isa ay sumusuporta ng hanggang 12 Endpoints • USB 2.0 compliant device IP core • Sinusuportahan ang on-the-go, high-speed, full-speed, at low- speed mode • Intel EHCI compliant USB host • 8-bit ULPI external PHY interface • Dalawang buong CAN 2.0B compliant CAN bus interface • CAN 2.0-A at CAN 2.0-B at ISO 118981-1 standard compliant • External PHY interface • Dalawang SD /SDIO 2.0/MMC3.31 compliant controllers • Dalawang full-duplex SPI port na may tatlong peripheral chip selects • Dalawang high-speed UART (hanggang 1 Mb/s) • Dalawang master at slave I2C interface • GPIO na may apat na 32-bit na bangko , kung saan hanggang 54 bits ay maaaring gamitin sa PS I/O (isang bangko ng 32b at isang bangko ng 22b) at hanggang 64 bits (hanggang sa dalawang bangko ng 32b) na konektado sa Programmable Logic • Hanggang 54 flexible multiplexed I/O (MIO) para sa peripheral pin assignments Interconnect • High-bandwidth connectivity sa loob ng PS at sa pagitan ng PS at PL • ARM AMBA® AXI based • QoS support on criticaL masters para sa latency at banda.